[dv,mem_bkdr_util] Migrate memory type-specific behavior out of mem_bkdr_util

hw/dv/sv/flash_bkdr_util/flash_bkdr_util.core

@@ -0,0 +1,26 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:flash_bkdr_util"
+description: "Backdoor read/write flash memory for DV"
+
+filesets:
+  files_dv:
+    depend:
+      - lowrisc:opentitan:bus_params_pkg
+      - lowrisc:dv:dv_utils
+      - lowrisc:dv:crypto_dpi_prince:0.1
+      - lowrisc:dv:crypto_dpi_present:0.1
+      - lowrisc:prim:secded:0.1
+      - lowrisc:ip_interfaces:flash_ctrl_pkg
+      - lowrisc:dv:mem_bkdr_util
+    files:
+      - flash_bkdr_util_pkg.sv
+      - flash_bkdr_util.sv: {is_include_file: true}
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_dv

hw/dv/sv/flash_bkdr_util/flash_bkdr_util_pkg.sv

@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package flash_bkdr_util_pkg;
+  // dep packages
+  import bus_params_pkg::BUS_AW;
+  import dv_utils_pkg::uint32_t, dv_utils_pkg::addr_range_t;
+  import lc_ctrl_state_pkg::*;
+  import mem_bkdr_util_pkg::*;
+  import prim_secded_pkg::*;
+  import sram_scrambler_pkg::*;
+  import uvm_pkg::*;
+
+  // macro includes
+  `include "uvm_macros.svh"
+  `include "dv_macros.svh"
+
+  // extended classes
+  `include "flash_bkdr_util.sv"
+
+endpackage

hw/dv/sv/mem_bkdr_util/mem_bkdr_util.core

@@ -14,17 +14,11 @@ filesets:
       - lowrisc:dv:crypto_dpi_present:0.1
       - lowrisc:prim:cipher_pkg:0.1
       - lowrisc:prim:secded:0.1
-      - lowrisc:ip:otp_ctrl_pkg:1.0
-      - lowrisc:ip_interfaces:flash_ctrl_pkg
       - lowrisc:dv:digestpp_dpi
       - lowrisc:ip:kmac_pkg
     files:
-      - sram_scrambler_pkg.sv
       - mem_bkdr_util_pkg.sv
-      - flash_bkdr_util.sv: {is_include_file: true}
       - mem_bkdr_util.sv: {is_include_file: true}
-      - rom_bkdr_util.sv: {is_include_file: true}
-      - sram_bkdr_util.sv: {is_include_file: true}
     file_type: systemVerilogSource
 
 targets:

hw/dv/sv/mem_bkdr_util/mem_bkdr_util_pkg.sv

@@ -36,17 +36,10 @@ package mem_bkdr_util_pkg;
     ParityOdd
   } err_detection_e;
 
-  parameter int ROM_DIGEST_SIZE = 256;
-  parameter int ROM_DIGEST_BYTES = ROM_DIGEST_SIZE / 8;
   // macro includes
   `include "uvm_macros.svh"
   `include "dv_macros.svh"
 
   // sources
   `include "mem_bkdr_util.sv"
-  // extended classes
-  `include "flash_bkdr_util.sv"
-  `include "rom_bkdr_util.sv"
-  `include "sram_bkdr_util.sv"
-
 endpackage

hw/ip/rom_ctrl/dv/env/rom_bkdr_util.core

@@ -0,0 +1,25 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:rom_bkdr_util"
+description: "Backdoor read/write ROM for DV"
+
+filesets:
+  files_dv:
+    depend:
+      - lowrisc:opentitan:bus_params_pkg
+      - lowrisc:dv:dv_utils
+      - lowrisc:dv:crypto_dpi_prince:0.1
+      - lowrisc:dv:crypto_dpi_present:0.1
+      - lowrisc:prim:secded:0.1
+      - lowrisc:dv:sram_bkdr_util
+    files:
+      - rom_bkdr_util_pkg.sv
+      - rom_bkdr_util.sv: {is_include_file: true}
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_dv

hw/ip/rom_ctrl/dv/env/rom_bkdr_util_pkg.sv

@@ -0,0 +1,24 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package rom_bkdr_util_pkg;
+  import bus_params_pkg::BUS_AW;
+  import dv_utils_pkg::uint32_t, dv_utils_pkg::addr_range_t;
+  import lc_ctrl_state_pkg::*;
+  import mem_bkdr_util_pkg::*;
+  import prim_secded_pkg::*;
+  // ROM scrambling uses the same properties as SRAM scrambling.
+  import sram_scrambler_pkg::*;
+  import uvm_pkg::*;
+
+  parameter int ROM_DIGEST_SIZE = 256;
+  parameter int ROM_DIGEST_BYTES = ROM_DIGEST_SIZE / 8;
+
+  // macro includes
+  `include "uvm_macros.svh"
+  `include "dv_macros.svh"
+
+  // sources
+  `include "rom_bkdr_util.sv"
+endpackage

hw/ip/rom_ctrl/dv/env/rom_ctrl_env.core

@@ -12,7 +12,7 @@ filesets:
     depend:
       - lowrisc:dv:ralgen
       - lowrisc:dv:cip_lib
-      - lowrisc:dv:mem_bkdr_util
+      - lowrisc:dv:rom_bkdr_util
       - lowrisc:dv:kmac_app_agent
     files:
       - rom_ctrl_prim_ral_pkg.sv

hw/ip/rom_ctrl/dv/rom_ctrl_sim.core

@@ -11,7 +11,7 @@ filesets:
 
   files_dv:
     depend:
-      - lowrisc:dv:mem_bkdr_util
+      - lowrisc:dv:rom_bkdr_util
       - lowrisc:dv:rom_ctrl_test
       - lowrisc:dv:rom_ctrl_sva
       - lowrisc:dv:rom_ctrl_cov

hw/ip/rom_ctrl/dv/tb.sv

@@ -8,7 +8,7 @@ module tb;
   import dv_utils_pkg::*;
   import rom_ctrl_env_pkg::*;
   import rom_ctrl_test_pkg::*;
-  import mem_bkdr_util_pkg::rom_bkdr_util;
+  import rom_bkdr_util_pkg::rom_bkdr_util;
 
   // macro includes
   `include "uvm_macros.svh"

hw/ip/sram_ctrl/dv/env/sram_bkdr_util.core

@@ -0,0 +1,26 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:sram_bkdr_util"
+description: "Backdoor read/write SRAM for DV"
+
+filesets:
+  files_dv:
+    depend:
+      - lowrisc:opentitan:bus_params_pkg
+      - lowrisc:dv:dv_utils
+      - lowrisc:dv:crypto_dpi_prince:0.1
+      - lowrisc:dv:crypto_dpi_present:0.1
+      - lowrisc:prim:secded:0.1
+      - lowrisc:dv:mem_bkdr_util
+    files:
+      - sram_scrambler_pkg.sv
+      - sram_bkdr_util_pkg.sv
+      - sram_bkdr_util.sv: {is_include_file: true}
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_dv

hw/ip/sram_ctrl/dv/env/sram_bkdr_util_pkg.sv

@@ -0,0 +1,20 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package sram_bkdr_util_pkg;
+  import bus_params_pkg::BUS_AW;
+  import dv_utils_pkg::uint32_t, dv_utils_pkg::addr_range_t;
+  import lc_ctrl_state_pkg::*;
+  import mem_bkdr_util_pkg::*;
+  import prim_secded_pkg::*;
+  import sram_scrambler_pkg::*;
+  import uvm_pkg::*;
+
+  // macro includes
+  `include "uvm_macros.svh"
+  `include "dv_macros.svh"
+
+  // sources
+  `include "sram_bkdr_util.sv"
+endpackage

hw/ip/sram_ctrl/dv/env/sram_ctrl_env.core

@@ -9,7 +9,7 @@ filesets:
     depend:
       - lowrisc:dv:ralgen
       - lowrisc:dv:cip_lib
-      - lowrisc:dv:mem_bkdr_util
+      - lowrisc:dv:sram_bkdr_util
       - lowrisc:dv:mem_bkdr_scb
     files:
       - sram_ctrl_prim_ral_pkg.sv

hw/ip/sram_ctrl/dv/sram_ctrl_sim.core

@@ -13,7 +13,7 @@ filesets:
 
   files_dv:
     depend:
-      - lowrisc:dv:mem_bkdr_util
+      - lowrisc:dv:sram_bkdr_util
       - lowrisc:dv:sram_ctrl_test
       - lowrisc:dv:sram_ctrl_sva
     files:

hw/ip/sram_ctrl/dv/tb.sv

@@ -9,7 +9,7 @@ module tb;
   import sram_ctrl_pkg::*;
   import sram_ctrl_env_pkg::*;
   import sram_ctrl_test_pkg::*;
-  import mem_bkdr_util_pkg::sram_bkdr_util;
+  import sram_bkdr_util_pkg::sram_bkdr_util;
 
   // macro includes
   `include "uvm_macros.svh"

hw/ip_templates/flash_ctrl/dv/env/flash_bkdr_util.core

@@ -0,0 +1,26 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:flash_bkdr_util"
+description: "Backdoor read/write flash memory for DV"
+
+filesets:
+  files_dv:
+    depend:
+      - lowrisc:opentitan:bus_params_pkg
+      - lowrisc:dv:dv_utils
+      - lowrisc:dv:crypto_dpi_prince:0.1
+      - lowrisc:dv:crypto_dpi_present:0.1
+      - lowrisc:prim:secded:0.1
+      - lowrisc:ip_interfaces:flash_ctrl_pkg
+      - lowrisc:dv:mem_bkdr_util
+    files:
+      - flash_bkdr_util_pkg.sv
+      - flash_bkdr_util.sv: {is_include_file: true}
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_dv

hw/ip_templates/flash_ctrl/dv/env/flash_bkdr_util.sv

@@ -0,0 +1,92 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// Specialization of the `mem_bkdr_util` class for flash memories.
+
+class flash_bkdr_util extends mem_bkdr_util;
+
+  localparam int unsigned FlashDataWidth = flash_phy_pkg::DataWidth;
+  localparam int unsigned FlashStagesPerCycle = FlashDataWidth / flash_phy_pkg::GfMultCycles;
+  localparam int unsigned FlashKeySize = flash_phy_pkg::KeySize;
+  localparam int unsigned FlashNumRoundsHalf = crypto_dpi_prince_pkg::NumRoundsHalf;
+  localparam int unsigned FlashAddrWidth = 16;
+
+  // Initialize the class instance.
+  // `extra_bits_per_subword` is the width of any additional metadata that is not captured in the
+  // secded package.
+  function new(string name = "", string path, int unsigned depth,
+               longint unsigned n_bits, err_detection_e err_detection_scheme,
+               int num_prince_rounds_half = 3,
+               int extra_bits_per_subword = 0, int unsigned system_base_addr = 0);
+    super.new(name, path, depth, n_bits, err_detection_scheme, num_prince_rounds_half,
+              extra_bits_per_subword, system_base_addr);
+  endfunction
+
+  function bit [FlashDataWidth-1:0] flash_gf_mult2(bit [FlashDataWidth-1:0] operand);
+    bit [FlashDataWidth-1:0] mult_out;
+
+    mult_out = operand[FlashDataWidth-1] ? (operand << 1) ^
+      flash_phy_pkg::ScrambleIPoly : (operand << 1);
+    return mult_out;
+  endfunction
+
+  function bit [FlashStagesPerCycle-1:0][FlashDataWidth-1:0] flash_gen_matrix(
+      bit [FlashDataWidth-1:0] seed, bit init);
+    bit [FlashStagesPerCycle-1:0][FlashDataWidth-1:0] matrix_out;
+
+    matrix_out[0] = init ? seed : flash_gf_mult2(seed);
+    matrix_out[FlashStagesPerCycle-1:1] = '0;
+    for (int i = 1; i < FlashStagesPerCycle; i++) begin
+      matrix_out[i] = flash_gf_mult2(matrix_out[i-1]);
+    end
+    return matrix_out;
+  endfunction
+
+  function bit [FlashDataWidth-1:0] flash_galois_multiply(bit [FlashKeySize-1:0] addr_key,
+                                                          bit [FlashAddrWidth-1:0] addr);
+    bit [FlashStagesPerCycle-1:0][FlashDataWidth-1:0] matrix[2];
+    bit [FlashDataWidth-1:0] product[2];
+    bit [FlashDataWidth-1:0] add_vector;
+    bit [FlashDataWidth-1:0] mult_out;
+
+    // generate matrix.
+    matrix[0] =
+        flash_gen_matrix({addr_key[FlashKeySize-FlashAddrWidth-1:FlashKeySize-64], addr}, 1'b1);
+    matrix[1] = flash_gen_matrix(matrix[0][FlashStagesPerCycle-1], 1'b0);
+    // galois multiply.
+    for (int j = 0; j < 2; j++) begin
+      mult_out = '0;
+      for (int i = 0; i < FlashStagesPerCycle; i++) begin
+        add_vector = addr_key[(j*FlashStagesPerCycle)+i] ? matrix[j][i] : '0;
+        mult_out   = mult_out ^ add_vector;
+      end
+      product[j] = mult_out;
+    end
+    product[1] = product[1] ^ product[0];
+    return product[1];
+  endfunction
+
+  virtual function void flash_write_scrambled(
+      bit [FlashDataWidth-1:0] data, bit [FlashAddrWidth-1:0] byte_addr,
+      bit [FlashKeySize-1:0] flash_addr_key, bit [FlashKeySize-1:0] flash_data_key);
+    bit [FlashAddrWidth-1:0] word_addr;
+    bit [FlashDataWidth-1:0] mask;
+    bit [FlashDataWidth-1:0] masked_data;
+    bit [FlashNumRoundsHalf-1:0][FlashDataWidth-1:0] scrambled_data;
+    bit [71:0] ecc_72;
+    bit [75:0] ecc_76;
+
+    word_addr = byte_addr >> addr_lsb;
+    mask = flash_galois_multiply(flash_addr_key, word_addr);
+    masked_data = data ^ mask;
+
+    crypto_dpi_prince_pkg::sv_dpi_prince_encrypt(.plaintext(masked_data), .key(flash_data_key),
+                                                 .old_key_schedule(0), .ciphertext(scrambled_data));
+    masked_data = scrambled_data[FlashNumRoundsHalf-1] ^ mask;
+    // ecc functions used are hardcoded to a fixed sized.
+    ecc_72 = prim_secded_pkg::prim_secded_hamming_72_64_enc(data[63:0]);
+    ecc_76 = prim_secded_pkg::prim_secded_hamming_76_68_enc({ecc_72[67:64], masked_data[63:0]});
+    write(byte_addr, ecc_76);
+  endfunction
+endclass

hw/ip_templates/flash_ctrl/dv/env/flash_bkdr_util_pkg.sv

@@ -0,0 +1,20 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package flash_bkdr_util_pkg;
+  // dep packages
+  import bus_params_pkg::BUS_AW;
+  import dv_utils_pkg::uint32_t, dv_utils_pkg::addr_range_t;
+  import lc_ctrl_state_pkg::*;
+  import mem_bkdr_util_pkg::*;
+  import prim_secded_pkg::*;
+  import uvm_pkg::*;
+
+  // macro includes
+  `include "uvm_macros.svh"
+  `include "dv_macros.svh"
+
+  // sources
+  `include "flash_bkdr_util.sv"
+endpackage

hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env.core.tpl

@@ -11,7 +11,7 @@ filesets:
       - lowrisc:dv:dv_base_reg
       - lowrisc:dv:dv_lib
       - lowrisc:dv:cip_lib
-      - lowrisc:dv:mem_bkdr_util
+      - lowrisc:dv:flash_bkdr_util
       - lowrisc:dv:flash_phy_prim_agent
       - ${instance_vlnv("lowrisc:ip:flash_ctrl_pkg")}
       - ${top_pkg_vlnv}

hw/ip_templates/flash_ctrl/dv/flash_ctrl_sim.core.tpl

@@ -14,7 +14,7 @@ filesets:
 
   files_dv:
     depend:
-      - lowrisc:dv:mem_bkdr_util
+      - lowrisc:dv:flash_bkdr_util
       - ${instance_vlnv("lowrisc:dv:flash_ctrl_test")}
       - ${instance_vlnv("lowrisc:dv:flash_ctrl_sva")}
       - ${instance_vlnv("lowrisc:dv:flash_ctrl_cov")}