[dv,mem_bkdr_util] Migrate memory type-specific behavior out of mem_bkdr_util #5895
Triggered via pull request
February 12, 2025 14:50
Status
Failure
Total duration
2h 36m 57s
Artifacts
31
ci.yml
on: pull_request
Lint (quick)
3m 20s
Earl Grey for CW310 Hyperdebug
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Build bitstream
2m 57s
Lint (slow)
10m 41s
Build documentation
5m 11s
Airgapped build
10m 52s
Verible lint
1m 11s
Run OTBN smoke Test
2m 34s
Run OTBN crypto tests
2m 49s
Verilated English Breakfast
7m 50s
Verilated Earl Grey
1h 13m
CW305's Bitstream
2m 25s
Build Docker Containers
2m 16s
Build and test software
18m 8s
Build and test Darjeeling software
3m 13s
QEMU smoketest
2m 11s
Hyper310 ROM_EXT Tests
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FPGA test
2m 23s
CW310 SiVal Tests
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FPGA test
3m 7s
CW310 SiVal ROM_EXT Tests
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FPGA test
5m 19s
CW310 Manufacturing Tests
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FPGA test
2m 54s
CW310 Test ROM Tests
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FPGA test
1m 56s
CW310 ROM Tests
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FPGA test
4m 15s
CW340 Test ROM Tests
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FPGA test
1m 52s
CW340 ROM Tests
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FPGA test
41s
CW340 ROM_EXT Tests
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FPGA test
2m 10s
CW340 SiVal Tests
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FPGA test
6m 19s
CW340 SiVal ROM_EXT Tests
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FPGA test
2m 10s
CW340 Manufacturing Tests
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FPGA test
31m 20s
Cache bitstreams to GCP
0s
Verify FPGA jobs
23s
Annotations
11 errors
Verilated English Breakfast
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Countermeasure check failed.
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Some target names have banned characters.
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Countermeasure check failed.
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Lint (slow)
Verilog style lint of DV sources with Verible failed. Run 'util/dvsim/dvsim.py -t veriblelint hw/top_earlgrey/lint/top_earlgrey_dv_lint_cfgs.hjson' and fix all errors.
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Lint (slow)
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Build and test software
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Artifacts
Produced during runtime
Name | Size | |
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chip_englishbreakfast_cw305
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1.39 MB |
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execute_manuf_fpga_tests_cw310-targets
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623 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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59.8 KB |
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execute_manuf_fpga_tests_cw340-targets
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594 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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55.9 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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598 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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32.1 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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427 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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7.14 KB |
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execute_rom_fpga_tests_cw310-targets
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1.73 KB |
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execute_rom_fpga_tests_cw310-test-results
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46.2 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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784 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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38.5 KB |
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execute_sival_fpga_tests_cw340-targets
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507 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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40.1 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.27 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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186 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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449 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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19 KB |
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execute_test_rom_fpga_tests_cw310-targets
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326 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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3.25 KB |
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execute_test_rom_fpga_tests_cw340-targets
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258 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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44.4 KB |
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partial-build-bin-chip_earlgrey_cw310
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6.02 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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5.97 MB |
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partial-build-bin-chip_earlgrey_cw340
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9.9 MB |
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sw_build_test-test-results
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73.1 KB |
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verilated_englishbreakfast
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7.03 MB |
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verilator_earlgrey-test-results
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9.09 KB |
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