[CIR][CIRGen]: Change SignBitOp result type to !cir.bool

llvm · Dec 2, 2024 · 6420143 · 6420143
1 parent 888f00c
commit 6420143
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Showing 4 changed files with 9 additions and 13 deletions.
diff --git a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
@@ -414,7 +414,7 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
   }
 
   cir::SignBitOp createSignBit(mlir::Location loc, mlir::Value val) {
-    auto resTy = cir::IntType::get(getContext(), 32, true);
+    auto resTy = cir::BoolType::get(getContext());
     return create<cir::SignBitOp>(loc, resTy, val);
   }
 

diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -5278,7 +5278,7 @@ def SignBitOp : CIR_Op<"signbit", [Pure]> {
     and zero (false) if the number is positive or zero.
   }];
   let arguments = (ins CIR_AnyFloat:$input);
-  let results = (outs SInt32:$res);
+  let results = (outs CIR_BoolType:$res);
   let assemblyFormat = [{
       $input attr-dict `:` type($input) `->` qualified(type($res))
   }];

diff --git a/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp b/clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
@@ -3832,8 +3832,7 @@ mlir::LogicalResult CIRToLLVMSignBitOpLowering::matchAndRewrite(
   auto cmpResult = rewriter.create<mlir::LLVM::ICmpOp>(
       op.getLoc(), mlir::LLVM::ICmpPredicate::slt, bitcast.getResult(), zero);
   auto converted = rewriter.create<mlir::LLVM::ZExtOp>(
-      op.getLoc(), mlir::IntegerType::get(rewriter.getContext(), 32),
-      cmpResult);
+      op.getLoc(), getTypeConverter()->convertType(op.getType()), cmpResult);
   rewriter.replaceOp(op, converted);
   return mlir::success();
 }

diff --git a/clang/test/CIR/CodeGen/builtin-signbit.c b/clang/test/CIR/CodeGen/builtin-signbit.c
@@ -5,31 +5,28 @@
 
 void test_signbit_float(float val) {
     // CIR-LABEL: test_signbit_float
-    // CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.float -> !s32i
+    // CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.float -> !cir.bool
     // LLVM-LABEL: test_signbit_float
     // LLVM: [[TMP1:%.*]] = bitcast float %{{.+}} to i32
     // LLVM: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
-    // LLVM: %{{.+}} = zext i1 [[TMP2]] to i32
-    __builtin_signbit(val);
+    if (__builtin_signbit(val)) {};
 }
 
 void test_signbit_double(double val) {
     // CIR-LABEL: test_signbit_double
-    // CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.float -> !s32i
+    // CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.float -> !cir.bool
     // LLVM-LABEL: test_signbit_double
     // LLVM: [[CONV:%.*]] = fptrunc double %{{.+}} to float
     // LLVM: [[TMP1:%.*]] = bitcast float [[CONV]] to i32
     // LLVM: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
-    // LLVM: %{{.+}} = zext i1 [[TMP2]] to i32
-    __builtin_signbitf(val);
+    if (__builtin_signbitf(val)) {}
 }
 
 void test_signbit_long_double(long double val) {
     // CIR: test_signbit_long_double
     // LLVM: test_signbit_long_double
-    __builtin_signbitl(val);
-    // CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.long_double<!cir.f80> -> !s32i
+    if (__builtin_signbitl(val)) {}
+    // CIR: %{{.+}} = cir.signbit %{{.+}} : !cir.long_double<!cir.f80> -> !cir.bool
     // LLVM: [[TMP1:%.*]] = bitcast x86_fp80 %{{.+}} to i80
     // LLVM: [[TMP2:%.*]] = icmp slt i80 [[TMP1]], 0
-    // LLVM: %{{.+}} = zext i1 [[TMP2]] to i32
 }