Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Temp fix for Android NDK REG_* conflicts #111681

Merged
merged 5 commits into from
Jan 22, 2025
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
172 changes: 172 additions & 0 deletions src/coreclr/jit/register.h
Original file line number Diff line number Diff line change
Expand Up @@ -133,6 +133,178 @@ REGDEF(K7, 7+KBASE, KMASK(7), "k7" )

REGDEF(STK, 8+KBASE, 0x0000, "STK" )

// Ignore REG_* symbols defined in Android NDK
#if defined(TARGET_X86)
#undef REG_EAX
#define REG_EAX JITREG_EAX
#undef REG_ECX
#define REG_ECX JITREG_ECX
#undef REG_EDX
#define REG_EDX JITREG_EDX
#undef REG_EBX
#define REG_EBX JITREG_EBX
#undef REG_ESP
#define REG_ESP JITREG_ESP
#undef REG_EBP
#define REG_EBP JITREG_EBP
#undef REG_ESI
#define REG_ESI JITREG_ESI
#undef REG_EDI
#define REG_EDI JITREG_EDI
#undef REG_RAX
#define REG_RAX JITREG_RAX
#undef REG_RCX
#define REG_RCX JITREG_RCX
#undef REG_RDX
#define REG_RDX JITREG_RDX
#undef REG_RBX
#define REG_RBX JITREG_RBX
#undef REG_RSP
#define REG_RSP JITREG_RSP
#undef REG_RBP
#define REG_RBP JITREG_RBP
#undef REG_RSI
#define REG_RSI JITREG_RSI
#undef REG_RDI
#define REG_RDI JITREG_RDI
#else // defined(TARGET_X86)
#undef REG_RAX
#define REG_RAX JITREG_RAX
#undef REG_RCX
#define REG_RCX JITREG_RCX
#undef REG_RDX
#define REG_RDX JITREG_RDX
#undef REG_RBX
#define REG_RBX JITREG_RBX
#undef REG_RSP
#define REG_RSP JITREG_RSP
#undef REG_RBP
#define REG_RBP JITREG_RBP
#undef REG_RSI
#define REG_RSI JITREG_RSI
#undef REG_RDI
#define REG_RDI JITREG_RDI
#undef REG_R8
#define REG_R8 JITREG_R8
#undef REG_R9
#define REG_R9 JITREG_R9
#undef REG_R10
#define REG_R10 JITREG_R10
#undef REG_R11
#define REG_R11 JITREG_R11
#undef REG_R12
#define REG_R12 JITREG_R12
#undef REG_R13
#define REG_R13 JITREG_R13
#undef REG_R14
#define REG_R14 JITREG_R14
#undef REG_R15
#define REG_R15 JITREG_R15
#undef REG_EAX
#define REG_EAX JITREG_EAX
#undef REG_ECX
#define REG_ECX JITREG_ECX
#undef REG_EDX
#define REG_EDX JITREG_EDX
#undef REG_EBX
#define REG_EBX JITREG_EBX
#undef REG_ESP
#define REG_ESP JITREG_ESP
#undef REG_EBP
#define REG_EBP JITREG_EBP
#undef REG_ESI
#define REG_ESI JITREG_ESI
#undef REG_EDI
#define REG_EDI JITREG_EDI
#endif // !defined(TARGET_X86)

#undef REG_XMM0
#define REG_XMM0 JITREG_XMM0
#undef REG_XMM1
#define REG_XMM1 JITREG_XMM1
#undef REG_XMM2
#define REG_XMM2 JITREG_XMM2
#undef REG_XMM3
#define REG_XMM3 JITREG_XMM3
#undef REG_XMM4
#define REG_XMM4 JITREG_XMM4
#undef REG_XMM5
#define REG_XMM5 JITREG_XMM5
#undef REG_XMM6
#define REG_XMM6 JITREG_XMM6
#undef REG_XMM7
#define REG_XMM7 JITREG_XMM7

#ifdef TARGET_AMD64
#undef REG_XMM8
#define REG_XMM8 JITREG_XMM8
#undef REG_XMM9
#define REG_XMM9 JITREG_XMM9
#undef REG_XMM10
#define REG_XMM10 JITREG_XMM10
#undef REG_XMM11
#define REG_XMM11 JITREG_XMM11
#undef REG_XMM12
#define REG_XMM12 JITREG_XMM12
#undef REG_XMM13
#define REG_XMM13 JITREG_XMM13
#undef REG_XMM14
#define REG_XMM14 JITREG_XMM14
#undef REG_XMM15
#define REG_XMM15 JITREG_XMM15
#undef REG_XMM16
#define REG_XMM16 JITREG_XMM16
#undef REG_XMM17
#define REG_XMM17 JITREG_XMM17
#undef REG_XMM18
#define REG_XMM18 JITREG_XMM18
#undef REG_XMM19
#define REG_XMM19 JITREG_XMM19
#undef REG_XMM20
#define REG_XMM20 JITREG_XMM20
#undef REG_XMM21
#define REG_XMM21 JITREG_XMM21
#undef REG_XMM22
#define REG_XMM22 JITREG_XMM22
#undef REG_XMM23
#define REG_XMM23 JITREG_XMM23
#undef REG_XMM24
#define REG_XMM24 JITREG_XMM24
#undef REG_XMM25
#define REG_XMM25 JITREG_XMM25
#undef REG_XMM26
#define REG_XMM26 JITREG_XMM26
#undef REG_XMM27
#define REG_XMM27 JITREG_XMM27
#undef REG_XMM28
#define REG_XMM28 JITREG_XMM28
#undef REG_XMM29
#define REG_XMM29 JITREG_XMM29
#undef REG_XMM30
#define REG_XMM30 JITREG_XMM30
#undef REG_XMM31
#define REG_XMM31 JITREG_XMM31
#endif // TARGET_AMD64

#undef REG_K0
#define REG_K0 JITREG_K0
#undef REG_K1
#define REG_K1 JITREG_K1
#undef REG_K2
#define REG_K2 JITREG_K2
#undef REG_K3
#define REG_K3 JITREG_K3
#undef REG_K4
#define REG_K4 JITREG_K4
#undef REG_K5
#define REG_K5 JITREG_K5
#undef REG_K6
#define REG_K6 JITREG_K6
#undef REG_K7
#define REG_K7 JITREG_K7
#undef REG_STK
#define REG_STK JITREG_STK

#elif defined(TARGET_ARM)
#include "registerarm.h"

Expand Down
108 changes: 108 additions & 0 deletions src/coreclr/jit/registerarm.h
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,114 @@ REGALIAS(R13, SP)
REGALIAS(R14, LR)
REGALIAS(R15, PC)

// Ignore REG_* symbols defined in Android NDK
#undef REG_R0
#define REG_R0 JITREG_R0
#undef REG_R1
#define REG_R1 JITREG_R1
#undef REG_R2
#define REG_R2 JITREG_R2
#undef REG_R3
#define REG_R3 JITREG_R3
#undef REG_R4
#define REG_R4 JITREG_R4
#undef REG_R5
#define REG_R5 JITREG_R5
#undef REG_R6
#define REG_R6 JITREG_R6
#undef REG_R7
#define REG_R7 JITREG_R7
#undef REG_R8
#define REG_R8 JITREG_R8
#undef REG_R9
#define REG_R9 JITREG_R9
#undef REG_R10
#define REG_R10 JITREG_R10
#undef REG_R11
#define REG_R11 JITREG_R11
#undef REG_R12
#define REG_R12 JITREG_R12
#undef REG_SP
#define REG_SP JITREG_SP
#undef REG_LR
#define REG_LR JITREG_LR
#undef REG_PC
#define REG_PC JITREG_PC
#undef REG_F0
#define REG_F0 JITREG_F0
#undef REG_F1
#define REG_F1 JITREG_F1
#undef REG_F2
#define REG_F2 JITREG_F2
#undef REG_F3
#define REG_F3 JITREG_F3
#undef REG_F4
#define REG_F4 JITREG_F4
#undef REG_F5
#define REG_F5 JITREG_F5
#undef REG_F6
#define REG_F6 JITREG_F6
#undef REG_F7
#define REG_F7 JITREG_F7
#undef REG_F8
#define REG_F8 JITREG_F8
#undef REG_F9
#define REG_F9 JITREG_F9
#undef REG_F10
#define REG_F10 JITREG_F10
#undef REG_F11
#define REG_F11 JITREG_F11
#undef REG_F12
#define REG_F12 JITREG_F12
#undef REG_F13
#define REG_F13 JITREG_F13
#undef REG_F14
#define REG_F14 JITREG_F14
#undef REG_F15
#define REG_F15 JITREG_F15
#undef REG_F16
#define REG_F16 JITREG_F16
#undef REG_F17
#define REG_F17 JITREG_F17
#undef REG_F18
#define REG_F18 JITREG_F18
#undef REG_F19
#define REG_F19 JITREG_F19
#undef REG_F20
#define REG_F20 JITREG_F20
#undef REG_F21
#define REG_F21 JITREG_F21
#undef REG_F22
#define REG_F22 JITREG_F22
#undef REG_F23
#define REG_F23 JITREG_F23
#undef REG_F24
#define REG_F24 JITREG_F24
#undef REG_F25
#define REG_F25 JITREG_F25
#undef REG_F26
#define REG_F26 JITREG_F26
#undef REG_F27
#define REG_F27 JITREG_F27
#undef REG_F28
#define REG_F28 JITREG_F28
#undef REG_F29
#define REG_F29 JITREG_F29
#undef REG_F30
#define REG_F30 JITREG_F30
#undef REG_F31
#define REG_F31 JITREG_F31
#undef REG_FP
#define REG_FP JITREG_FP
#undef REG_R13
#define REG_R13 JITREG_R13
#undef REG_R14
#define REG_R14 JITREG_R14
#undef REG_R15
#define REG_R15 JITREG_R15
#undef REG_STK
#define REG_STK JITREG_STK

// This must be last!
REGDEF(STK, 32+FPBASE, 0x0000, "STK")

Expand Down
Loading
Loading