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Add a separate netclass with wider traces for power
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soundmonster authored and MvEerd committed Jan 9, 2022
1 parent 1bc56eb commit 801ae19
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Showing 4 changed files with 61 additions and 6 deletions.
34 changes: 28 additions & 6 deletions src/pcbs.js
Original file line number Diff line number Diff line change
Expand Up @@ -101,7 +101,7 @@ const kicad_suffix = `
)
`

const kicad_netclass = `
const kicad_default_netclass = `
(net_class Default "This is the default net class."
(clearance 0.2)
(trace_width 0.25)
Expand All @@ -113,6 +113,18 @@ const kicad_netclass = `
)
`

const kicad_power_netclass = `
(net_class Power "This is the power net class."
(clearance 0.2)
(trace_width 0.5)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)
__ADD_NET
)
`

const makerjs2kicad = exports._makerjs2kicad = (model, layer='Edge.Cuts') => {
const grs = []
const xy = val => `${val[0]} ${-val[1]}`
Expand Down Expand Up @@ -292,13 +304,22 @@ exports.parse = (config, points, outlines, units) => {

// finalizing nets
const nets_arr = []
const add_nets_arr = []
const add_default_nets_arr = []
const add_power_nets_arr = []
for (const [net, index] of Object.entries(nets)) {
nets_arr.push(`(net ${index} "${net}")`)
add_nets_arr.push(`(add_net "${net}")`)
if (['vcc', 'vdd', 'raw', 'gnd'].includes(net.toLowerCase())) {
add_power_nets_arr.push(`(add_net "${net}")`)
} else {
add_default_nets_arr.push(`(add_net "${net}")`)
}
}

const netclass = kicad_netclass.replace('__ADD_NET', add_nets_arr.join('\n'))
const power_filter = net => {}
const signal_filter = net => { !power_filter(net) }

const default_netclass = kicad_default_netclass.replace('__ADD_NET', add_default_nets_arr.join('\n'))
const power_netclass = kicad_power_netclass.replace('__ADD_NET', add_power_nets_arr.join('\n'))
const nets_text = nets_arr.join('\n')
const footprint_text = footprints.join('\n')
const outline_text = Object.values(kicad_outlines).join('\n')
Expand All @@ -309,12 +330,13 @@ exports.parse = (config, points, outlines, units) => {
results[pcb_name] = `
${personalized_prefix}
${nets_text}
${netclass}
${default_netclass}
${power_netclass}
${footprint_text}
${outline_text}
${kicad_suffix}
`
}

return results
}
}
11 changes: 11 additions & 0 deletions test/cli/big/reference/pcbs/_export.kicad_pcb
Original file line number Diff line number Diff line change
Expand Up @@ -105,6 +105,17 @@
)


(net_class Power "This is the power net class."
(clearance 0.2)
(trace_width 0.5)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)

)




)
Expand Down
11 changes: 11 additions & 0 deletions test/cli/big/reference/pcbs/export.kicad_pcb
Original file line number Diff line number Diff line change
Expand Up @@ -105,6 +105,17 @@
)


(net_class Power "This is the power net class."
(clearance 0.2)
(trace_width 0.5)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)

)




)
Expand Down
11 changes: 11 additions & 0 deletions test/cli/medium/reference/pcbs/export.kicad_pcb
Original file line number Diff line number Diff line change
Expand Up @@ -105,6 +105,17 @@
)


(net_class Power "This is the power net class."
(clearance 0.2)
(trace_width 0.5)
(via_dia 0.8)
(via_drill 0.4)
(uvia_dia 0.3)
(uvia_drill 0.1)

)




)
Expand Down

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