forked from lfantoniosi/mce2vga
-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathmce2vga.qsf
255 lines (253 loc) · 13.3 KB
/
mce2vga.qsf
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, the Altera Quartus II License Agreement,
# the Altera MegaCore Function License Agreement, or other
# applicable license agreement, including, without limitation,
# that your use is for the sole purpose of programming logic
# devices manufactured by Altera and sold by Altera or its
# authorized distributors. Please refer to the applicable
# agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition
# Date created = 23:21:37 September 08, 2017
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# mce2vga_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE6E22C8
set_global_assignment -name TOP_LEVEL_ENTITY schematic
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:21:37 SEPTEMBER 08, 2017"
set_global_assignment -name LAST_QUARTUS_VERSION "17.0.0 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name DEVICE_FILTER_PACKAGE "ANY QFP"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
set_location_assignment PIN_23 -to CLK
set_location_assignment PIN_65 -to SRAM_DQ0
set_location_assignment PIN_67 -to SRAM_DQ1
set_location_assignment PIN_69 -to SRAM_DQ2
set_location_assignment PIN_71 -to SRAM_DQ3
set_location_assignment PIN_73 -to SRAM_DQ4
set_location_assignment PIN_75 -to SRAM_DQ5
set_location_assignment PIN_77 -to SRAM_DQ6
set_location_assignment PIN_83 -to SRAM_DQ7
set_location_assignment PIN_85 -to SRAM_DQ8
set_location_assignment PIN_87 -to SRAM_DQ9
set_location_assignment PIN_99 -to SRAM_DQ10
set_location_assignment PIN_101 -to SRAM_DQ11
set_location_assignment PIN_104 -to SRAM_DQ12
set_location_assignment PIN_106 -to SRAM_DQ13
set_location_assignment PIN_111 -to SRAM_DQ14
set_location_assignment PIN_113 -to SRAM_DQ15
set_location_assignment PIN_38 -to H
set_location_assignment PIN_44 -to PB
set_location_assignment PIN_51 -to PG
set_location_assignment PIN_55 -to PR
set_location_assignment PIN_42 -to SB
set_location_assignment PIN_49 -to SG
set_location_assignment PIN_53 -to SR
set_location_assignment PIN_127 -to SW0
set_location_assignment PIN_129 -to SW1
set_location_assignment PIN_133 -to SW2
set_location_assignment PIN_136 -to SW3
set_location_assignment PIN_33 -to V
set_location_assignment PIN_142 -to B0
set_location_assignment PIN_132 -to B1
set_location_assignment PIN_135 -to B2
set_location_assignment PIN_144 -to G0
set_location_assignment PIN_137 -to G1
set_location_assignment PIN_141 -to G2
set_location_assignment PIN_128 -to HSYNC
set_location_assignment PIN_3 -to LED0
set_location_assignment PIN_7 -to LED1
set_location_assignment PIN_10 -to LED2
set_location_assignment PIN_11 -to LED3
set_location_assignment PIN_2 -to R0
set_location_assignment PIN_143 -to R1
set_location_assignment PIN_1 -to R2
set_location_assignment PIN_59 -to SRAM_ADDR0
set_location_assignment PIN_64 -to SRAM_ADDR1
set_location_assignment PIN_66 -to SRAM_ADDR2
set_location_assignment PIN_68 -to SRAM_ADDR3
set_location_assignment PIN_70 -to SRAM_ADDR4
set_location_assignment PIN_72 -to SRAM_ADDR5
set_location_assignment PIN_74 -to SRAM_ADDR6
set_location_assignment PIN_76 -to SRAM_ADDR7
set_location_assignment PIN_80 -to SRAM_ADDR8
set_location_assignment PIN_84 -to SRAM_ADDR9
set_location_assignment PIN_86 -to SRAM_ADDR10
set_location_assignment PIN_98 -to SRAM_ADDR11
set_location_assignment PIN_100 -to SRAM_ADDR12
set_location_assignment PIN_103 -to SRAM_ADDR13
set_location_assignment PIN_105 -to SRAM_ADDR14
set_location_assignment PIN_110 -to SRAM_ADDR15
set_location_assignment PIN_112 -to SRAM_ADDR16
set_location_assignment PIN_114 -to SRAM_ADDR17
set_location_assignment PIN_119 -to SRAM_CE
set_location_assignment PIN_120 -to SRAM_LB
set_location_assignment PIN_121 -to SRAM_OE
set_location_assignment PIN_115 -to SRAM_UB
set_location_assignment PIN_60 -to SRAM_WE
set_location_assignment PIN_126 -to VSYNC
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW0
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW2
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to SW3
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to LED0
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to LED1
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to LED2
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to LED3
set_global_assignment -name ENABLE_OCT_DONE OFF
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_location_assignment PIN_125 -to RESET
set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"
set_global_assignment -name ALLOW_REGISTER_RETIMING OFF
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to RESET
set_location_assignment PIN_31 -to R3
set_location_assignment PIN_28 -to G3
set_location_assignment PIN_32 -to B3
set_location_assignment PIN_58 -to LEFT_BTN
set_location_assignment PIN_54 -to RIGHT_BTN
set_location_assignment PIN_52 -to UP_BTN
set_location_assignment PIN_50 -to DOWN_BTN
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to LEFT_BTN
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to RIGHT_BTN
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to UP_BTN
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to DOWN_BTN
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS ON
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name STRATIXV_CONFIGURATION_SCHEME "PASSIVE SERIAL"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS INPUT TRI-STATED"
set_instance_assignment -name IO_STANDARD "2.5 V" -to B0
set_instance_assignment -name IO_STANDARD "2.5 V" -to B1
set_instance_assignment -name IO_STANDARD "2.5 V" -to B2
set_instance_assignment -name IO_STANDARD "2.5 V" -to B3
set_instance_assignment -name IO_STANDARD "2.5 V" -to CLK
set_instance_assignment -name IO_STANDARD "2.5 V" -to DOWN_BTN
set_instance_assignment -name IO_STANDARD "2.5 V" -to G0
set_instance_assignment -name IO_STANDARD "2.5 V" -to G1
set_instance_assignment -name IO_STANDARD "2.5 V" -to G2
set_instance_assignment -name IO_STANDARD "2.5 V" -to G3
set_instance_assignment -name IO_STANDARD "2.5 V" -to H
set_instance_assignment -name IO_STANDARD "2.5 V" -to HSYNC
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED0
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED1
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED2
set_instance_assignment -name IO_STANDARD "2.5 V" -to LED3
set_instance_assignment -name IO_STANDARD "2.5 V" -to LEFT_BTN
set_instance_assignment -name IO_STANDARD "2.5 V" -to PB
set_instance_assignment -name IO_STANDARD "2.5 V" -to PG
set_instance_assignment -name IO_STANDARD "2.5 V" -to PR
set_instance_assignment -name IO_STANDARD "2.5 V" -to R0
set_instance_assignment -name IO_STANDARD "2.5 V" -to R1
set_instance_assignment -name IO_STANDARD "2.5 V" -to R2
set_instance_assignment -name IO_STANDARD "2.5 V" -to R3
set_instance_assignment -name IO_STANDARD "2.5 V" -to RESET
set_instance_assignment -name IO_STANDARD "2.5 V" -to RIGHT_BTN
set_instance_assignment -name IO_STANDARD "2.5 V" -to SB
set_instance_assignment -name IO_STANDARD "2.5 V" -to SG
set_instance_assignment -name IO_STANDARD "2.5 V" -to SR
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR0
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR1
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR2
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR3
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR4
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR5
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR6
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR7
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR8
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR9
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR10
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR11
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR12
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR13
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR14
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR15
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR16
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_ADDR17
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_CE
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ0
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ1
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ2
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ3
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ4
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ5
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ6
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ7
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ8
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ9
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ10
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ11
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ12
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ13
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ14
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_DQ15
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_LB
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_OE
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_UB
set_instance_assignment -name IO_STANDARD "2.5 V" -to SRAM_WE
set_instance_assignment -name IO_STANDARD "2.5 V" -to SW0
set_instance_assignment -name IO_STANDARD "2.5 V" -to SW1
set_instance_assignment -name IO_STANDARD "2.5 V" -to SW2
set_instance_assignment -name IO_STANDARD "2.5 V" -to SW3
set_instance_assignment -name IO_STANDARD "2.5 V" -to UP_BTN
set_instance_assignment -name IO_STANDARD "2.5 V" -to V
set_instance_assignment -name IO_STANDARD "2.5 V" -to VSYNC
set_global_assignment -name SDC_FILE mce2vga.sdc
set_global_assignment -name BDF_FILE schematic.bdf
set_global_assignment -name QIP_FILE pll1.qip
set_global_assignment -name QIP_FILE pll2.qip
set_global_assignment -name VHDL_FILE sync_level.vhd
set_global_assignment -name VHDL_FILE mda_genlock.vhd
set_global_assignment -name VHDL_FILE sram.vhd
set_global_assignment -name VHDL_FILE vga_video.vhd
set_global_assignment -name VHDL_FILE cga_genlock.vhd
set_global_assignment -name VHDL_FILE ega_genlock.vhd
set_global_assignment -name VHDL_FILE dual_ram_out.vhd
set_global_assignment -name VHDL_FILE dual_ram_in.vhd
set_global_assignment -name VHDL_FILE hgc_genlock.vhd
set_global_assignment -name VHDL_FILE ctrl_params.vhd
set_global_assignment -name VHDL_FILE osd_rom.vhd
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top