diff --git a/locale/circuitpython.pot b/locale/circuitpython.pot index 28712b4f1cfa..c8d7cec4b98f 100644 --- a/locale/circuitpython.pot +++ b/locale/circuitpython.pot @@ -1019,6 +1019,7 @@ msgstr "" #: ports/atmel-samd/common-hal/canio/Listener.c #: ports/espressif/common-hal/canio/Listener.c +#: ports/mimxrt10xx/common-hal/canio/Listener.c #: ports/stm/common-hal/canio/Listener.c msgid "Filters too complex" msgstr "" @@ -2140,6 +2141,10 @@ msgstr "" msgid "Unable to read color palette data" msgstr "" +#: ports/mimxrt10xx/common-hal/canio/CAN.c +msgid "Unable to send CAN Message: all Tx message buffers are busy" +msgstr "" + #: ports/espressif/common-hal/mdns/Server.c #: ports/raspberrypi/common-hal/mdns/Server.c msgid "Unable to start mDNS query" diff --git a/ports/mimxrt10xx/Makefile b/ports/mimxrt10xx/Makefile index f13207451e6c..04b8c6787aff 100644 --- a/ports/mimxrt10xx/Makefile +++ b/ports/mimxrt10xx/Makefile @@ -126,6 +126,10 @@ SRC_SDK += drivers/adc_12b1msps_sar/fsl_adc.c \ drivers/tempmon/fsl_tempmon.c endif +ifeq ($(CIRCUITPY_CANIO), 1) +SRC_SDK += drivers/flexcan/fsl_flexcan.c +endif + ifeq ($(CHIP_FAMILY), MIMXRT1176) SRC_SDK += devices/$(CHIP_FAMILY)/drivers/fsl_anatop_ai.c \ devices/$(CHIP_FAMILY)/drivers/fsl_dcdc.c \ diff --git a/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk b/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk index 7d16b797c522..6d1f802d6e35 100644 --- a/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk +++ b/ports/mimxrt10xx/boards/teensy41/mpconfigboard.mk @@ -7,5 +7,6 @@ CHIP_VARIANT = MIMXRT1062DVJ6A CHIP_FAMILY = MIMXRT1062 FLASH = W25Q64JV CIRCUITPY__EVE = 1 +CIRCUITPY_CANIO = 1 CIRCUITPY_USB_HOST = 1 CIRCUITPY_SETTABLE_PROCESSOR_FREQUENCY = 1 diff --git a/ports/mimxrt10xx/boards/teensy41/pins.c b/ports/mimxrt10xx/boards/teensy41/pins.c index 64eac9e4b70c..84236382330d 100644 --- a/ports/mimxrt10xx/boards/teensy41/pins.c +++ b/ports/mimxrt10xx/boards/teensy41/pins.c @@ -179,5 +179,23 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { {MP_OBJ_NEW_QSTR(MP_QSTR_TX7), MP_ROM_PTR(&pin_GPIO_EMC_31)}, {MP_OBJ_NEW_QSTR(MP_QSTR_RX8), MP_ROM_PTR(&pin_GPIO_B1_13)}, {MP_OBJ_NEW_QSTR(MP_QSTR_TX8), MP_ROM_PTR(&pin_GPIO_B1_12)}, + + // CAN and CAN-FD + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN1_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_09)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN1_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_08)}, + + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN2_RX), MP_ROM_PTR(&pin_GPIO_AD_B0_03)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN2_TX), MP_ROM_PTR(&pin_GPIO_AD_B0_02)}, + + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN3_RX), MP_ROM_PTR(&pin_GPIO_EMC_37)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN3_TX), MP_ROM_PTR(&pin_GPIO_EMC_36)}, + + // "CAN" is an alias for CAN1 + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN_RX), MP_ROM_PTR(&pin_GPIO_AD_B1_09)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_CAN_TX), MP_ROM_PTR(&pin_GPIO_AD_B1_08)}, + + // "CANFD" is an alias for CAN3 + {MP_OBJ_NEW_QSTR(MP_QSTR_CANFD_RX), MP_ROM_PTR(&pin_GPIO_EMC_37)}, + {MP_OBJ_NEW_QSTR(MP_QSTR_CANFD_TX), MP_ROM_PTR(&pin_GPIO_EMC_36)}, }; MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/mimxrt10xx/common-hal/canio/CAN.c b/ports/mimxrt10xx/common-hal/canio/CAN.c new file mode 100644 index 000000000000..ba2c2482a34b --- /dev/null +++ b/ports/mimxrt10xx/common-hal/canio/CAN.c @@ -0,0 +1,445 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox +// SPDX-FileCopyrightText: Copyright (c) 2025 SamantazFox +// +// SPDX-License-Identifier: MIT + +#include + +#include "py/runtime.h" +#include "py/mperrno.h" + +#include "common-hal/canio/CAN.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "shared-bindings/util.h" +#include "supervisor/port.h" +#include "supervisor/shared/tick.h" + +#include "sdk/drivers/flexcan/fsl_flexcan.h" + + +// Be verbose +#define MIMXRT_CANIO_CAN_DEBUG(...) (void)0 +// #define MIMXRT_CANIO_CAN_DEBUG(...) mp_printf(&mp_plat_print, __VA_ARGS__) + +#define MIMXRT_CANIO_CAN_CALLBACK_DEBUG(...) (void)0 +// #define MIMXRT_CANIO_CAN_CALLBACK_DEBUG(...) mp_printf(&mp_plat_print, __VA_ARGS__) + + +static CAN_Type *const flexcan_bases[] = CAN_BASE_PTRS; // e.g.: { (CAN_Type *)0u, CAN1, CAN2, CAN3 } +static canio_can_obj_t *can_objs[MP_ARRAY_SIZE(mcu_can_banks)]; + +// Get frequency of flexcan clock. +#define MIMXRT10XX_FLEXCAN_CLK_FREQ ((CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8) / (CLOCK_GetDiv(kCLOCK_CanDiv) + 1)) + +static void config_periph_pin(const mcu_periph_obj_t *periph) { + if (!periph) { + return; + } + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + 0, + 0); + + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_PUS(0) // Pull Up/Down Config. Field: 100K Ohm Pull Down + #if IMXRT10XX + | IOMUXC_SW_PAD_CTL_PAD_HYS(0) // Hyst. Enable Field: Hysteresis Disabled + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) // Pull/Keep Enable Field: Pull/Keeper Enabled + | IOMUXC_SW_PAD_CTL_PAD_SPEED(2) // Speed Field: medium (100MHz) + #endif + | IOMUXC_SW_PAD_CTL_PAD_PUE(0) // Pull/Keep Select Field: Keeper + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) // Open Drain Enable Field: Open Drain Disabled + | IOMUXC_SW_PAD_CTL_PAD_DSE(6) // Drive Strength Field: R0/6 + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); // Slew Rate Field: Slow Slew Rate +} + +static uint8_t mimxrt10xx_flexcan_get_free_tx_mbid(canio_can_obj_t *self) { + // Get the next free tx message buffer atomically so that an interrupt can't occur while + // doing bit search. + // + // The idea here is that in an integer each bit acts as a boolean telling us if a + // tx message buffer is in use or not. + // If a free message buffer is found then we set it as used and return it's index. + bool found_free_tx_mb = false; + int8_t tx_array_id = 0; + mp_uint_t atomic_state = MICROPY_BEGIN_ATOMIC_SECTION(); + for ( ; tx_array_id < MIMXRT10XX_FLEXCAN_TX_MB_NUM; ++tx_array_id) + { + uint64_t tx_array_id_bit = (1UL << tx_array_id); + if (!(self->data->tx_state & tx_array_id_bit)) { + // Found a free tx array id. Mark it as used. + MIMXRT_CANIO_CAN_DEBUG("canio: Found free Tx MB: %d\n", tx_array_id); + self->data->tx_state |= tx_array_id_bit; + found_free_tx_mb = true; + break; + } + } + MICROPY_END_ATOMIC_SECTION(atomic_state); + + if (!found_free_tx_mb) { + mp_raise_ValueError(MP_ERROR_TEXT("Unable to send CAN Message: all Tx message buffers are busy")); + } + + return MIMXRT10XX_FLEXCAN_TX_ARRID_TO_MBID(tx_array_id); +} + +static void mimxrt10xx_flexcan_set_tx_mb_free_by_mbid(canio_can_obj_t *self, uint8_t mb_idx) { + // We simply set the Nth bit zero. This means that that message buffer is free to use. + uint64_t tx_array_id_bit = (1UL << MIMXRT10XX_FLEXCAN_TX_MBID_TO_ARRID(mb_idx)); + self->data->tx_state &= ~(tx_array_id_bit); +} + +static void mimxrt10xx_flexcan_set_tx_mb_busy_by_mbid(canio_can_obj_t *self, uint8_t mb_idx) { + // We simply set the Nth bit 1. This means that that message buffer is busy and cannot be used. + uint64_t tx_array_id_bit = (1UL << MIMXRT10XX_FLEXCAN_TX_MBID_TO_ARRID(mb_idx)); + self->data->tx_state |= tx_array_id_bit; +} + +static void mimxrt10xx_flexcan_abort_tx_frames(canio_can_obj_t *self) { + for (uint8_t tx_array_id = 0; tx_array_id < MIMXRT10XX_FLEXCAN_TX_MB_NUM; ++tx_array_id) + { + uint64_t tx_array_id_bit = (1UL << tx_array_id); + if (self->data->tx_state & tx_array_id_bit) { + // Found a used/busy tx message buffer. Abort it. + FLEXCAN_TransferAbortSend(self->data->base, &self->data->handle, MIMXRT10XX_FLEXCAN_TX_ARRID_TO_MBID(tx_array_id)); + + self->data->tx_state &= ~(tx_array_id_bit); // Mark tx message buffer as free. + } + } +} + +static void mimxrt10xx_flexcan_handle_error(canio_can_obj_t *self) { + canio_bus_state_t state = common_hal_canio_can_state_get(self); + if (state == BUS_STATE_OFF) { + // Abort any pending tx and rx in case of bus-off. + mimxrt10xx_flexcan_abort_tx_frames(self); + FLEXCAN_TransferAbortReceiveFifo(self->data->base, &self->data->handle); + } +} + +static FLEXCAN_CALLBACK(mimxrt10xx_flexcan_callback) +{ + (void)base; // unused variable + (void)handle; // unused variable + // The result field can either be a message buffer index or a status flags value. + + canio_can_obj_t *self = (canio_can_obj_t *)userData; + + switch (status) { + + // Process rx message buffer is idle event. + case kStatus_FLEXCAN_RxIdle: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxIdle\n"); + // We don't control any rx message buffers 'manually'. The rx fifo has control. + break; + + // Process tx message buffer is idle event. + case kStatus_FLEXCAN_TxIdle: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = TxIdle\n"); + mimxrt10xx_flexcan_set_tx_mb_free_by_mbid(self, result); + break; + + // Process tx message buffer is busy event. + case kStatus_FLEXCAN_TxBusy: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = TxBusy\n"); + mimxrt10xx_flexcan_set_tx_mb_busy_by_mbid(self, result); + break; + + // Process remote message is send out and message buffer changed to receive one event. + case kStatus_FLEXCAN_TxSwitchToRx: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = TxSwitchToRx\n"); + mimxrt10xx_flexcan_set_tx_mb_free_by_mbid(self, result); + break; + + // Process rx message buffer is busy event. + case kStatus_FLEXCAN_RxBusy: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxBusy\n"); + break; + + // Process rx message buffer is overflowed event. + case kStatus_FLEXCAN_RxOverflow: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxOverflow\n"); + break; + + // Process rx message fifo is busy event. + case kStatus_FLEXCAN_RxFifoBusy: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxFifoBusy\n"); + break; + + // Process rx message fifo is idle event. + case kStatus_FLEXCAN_RxFifoIdle: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxFifoIdle\n"); + break; + + // Process rx message fifo is overflowed event. + case kStatus_FLEXCAN_RxFifoOverflow: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxFifoOverflow\n"); + break; + + // Process rx message fifo is almost overflowed event. + case kStatus_FLEXCAN_RxFifoWarning: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxFifoWarning\n"); + break; + + // Process rx message fifo is disabled during reading event. + case kStatus_FLEXCAN_RxFifoDisabled: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = RxFifoDisabled\n"); + break; + + // Process FlexCAN is waken up from stop mode event. + case kStatus_FLEXCAN_WakeUp: + MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = WakeUp\n"); + break; + + // Process unhandled interrupt asserted event. + case kStatus_FLEXCAN_UnHandled: + // Process FlexCAN module error and status event. + case kStatus_FLEXCAN_ErrorStatus: + // This is *very* verbose when the bus is disconnected! + // MIMXRT_CANIO_CAN_CALLBACK_DEBUG("canio: callback got status = UnHandled or ErrorStatus"); + + // We could do some fancy statistics update, but canio does not have. + mimxrt10xx_flexcan_handle_error(self); + break; + } +} + +void common_hal_canio_can_construct(canio_can_obj_t *self, const mcu_pin_obj_t *tx, const mcu_pin_obj_t *rx, int baudrate, bool loopback, bool silent) { + + int instance = -1; + const mcu_periph_obj_t *rx_periph = find_pin_function(mcu_can_rx_list, rx, &instance, MP_QSTR_rx); + const mcu_periph_obj_t *tx_periph = find_pin_function(mcu_can_tx_list, tx, &instance, MP_QSTR_tx); + + MIMXRT_CANIO_CAN_DEBUG("canio: init instance: %d\n", instance); + MIMXRT_CANIO_CAN_DEBUG("canio: init loopback: %d\n", loopback ? 1 : 0); + MIMXRT_CANIO_CAN_DEBUG("canio: init silent: %d\n", silent ? 1 : 0); + MIMXRT_CANIO_CAN_DEBUG("canio: init baudrate: %d\n", baudrate); + + self->rx_pin = rx; + self->tx_pin = tx; + config_periph_pin(rx_periph); + config_periph_pin(tx_periph); + + self->loopback = loopback; + self->silent = silent; + self->baudrate = baudrate; + + self->data = m_new_obj(mimxrt10xx_flexcan_data_t); + self->data->base = flexcan_bases[instance]; // 'flexcan_bases' start indexing from 1. (The first element is NULL) + self->data->tx_state = 0; + + // Get flexcan module default configuration. + flexcan_config_t config; + FLEXCAN_GetDefaultConfig(&config); + + // Change default flexcan module configuration based on canio constructor parameters. + config.clkSrc = CLOCK_GetMux(kCLOCK_CanMux); + config.baudRate = baudrate; + config.enableLoopBack = loopback; + config.enableListenOnlyMode = silent; + config.maxMbNum = 64; + config.enableIndividMask = true; // required to enable matching using a 'Listener' + // config.disableSelfReception = true; // TODO: do we want to disable this? + + #if (defined(MIMXRT10XX_FLEXCAN_USE_IMPROVED_TIMING_CONFIG) && MIMXRT10XX_FLEXCAN_USE_IMPROVED_TIMING_CONFIG) + // If improved timing configuration is enabled then tell the SDK to calculate it. + flexcan_timing_config_t timing_config; + memset(&timing_config, 0, sizeof(flexcan_timing_config_t)); + if (FLEXCAN_CalculateImprovedTimingValues(self->data->base, config.baudRate, MIMXRT10XX_FLEXCAN_CLK_FREQ, &timing_config)) { + // SDK could calculate the improved timing configuration. Yay! + // Let's update our flexcan module config to use it. + memcpy(&(config.timingConfig), &timing_config, sizeof(flexcan_timing_config_t)); + } + #endif + + // Initialize the flexcan module with user-defined settings. + FLEXCAN_Init(self->data->base, &config, MIMXRT10XX_FLEXCAN_CLK_FREQ); + + // Create FlexCAN handle structure and set call back function. + // As callback data we set 'self'. In callback we can cast it back to 'canio_can_obj_t'. + FLEXCAN_TransferCreateHandle(self->data->base, &self->data->handle, mimxrt10xx_flexcan_callback, (void *)self); + + // Set rx mask to don't care on all bits. + flexcan_rx_fifo_config_t fifo_config; + fifo_config.idFilterNum = 0; + fifo_config.idFilterTable = self->data->rx_fifo_filter; + fifo_config.idFilterType = kFLEXCAN_RxFifoFilterTypeA; + fifo_config.priority = kFLEXCAN_RxFifoPrioHigh; + FLEXCAN_SetRxFifoConfig(self->data->base, &fifo_config, true); + + claim_pin(rx); + claim_pin(tx); + + can_objs[instance] = self; +} + +bool common_hal_canio_can_loopback_get(canio_can_obj_t *self) { + return self->loopback; +} + +int common_hal_canio_can_baudrate_get(canio_can_obj_t *self) { + return self->baudrate; +} + +int common_hal_canio_can_transmit_error_count_get(canio_can_obj_t *self) { + uint8_t tx_err_cnt; // Transmit error counter. + FLEXCAN_GetBusErrCount(self->data->base, &tx_err_cnt, NULL); + return tx_err_cnt; +} + +int common_hal_canio_can_receive_error_count_get(canio_can_obj_t *self) { + uint8_t rx_err_cnt; // Transmit error counter. + FLEXCAN_GetBusErrCount(self->data->base, NULL, &rx_err_cnt); + return rx_err_cnt; +} + +canio_bus_state_t common_hal_canio_can_state_get(canio_can_obj_t *self) { + uint64_t status_flags = FLEXCAN_GetStatusFlags(self->data->base); + if ((status_flags & CAN_ESR1_FLTCONF(2)) != 0U) { + return BUS_STATE_OFF; + } + if ((status_flags & CAN_ESR1_FLTCONF(1)) != 0U) { + return BUS_STATE_ERROR_PASSIVE; + } + if ((status_flags & (kFLEXCAN_TxErrorWarningFlag | kFLEXCAN_RxErrorWarningFlag)) != 0) { + return BUS_STATE_ERROR_WARNING; + } + return BUS_STATE_ERROR_ACTIVE; +} + +void common_hal_canio_can_restart(canio_can_obj_t *self) { + // Supposedly the felxcan SDK has built in recovery. + // But I will leave this code here just in case. + + canio_bus_state_t state = common_hal_canio_can_state_get(self); + if (state != BUS_STATE_OFF) { + return; + } + + self->data->base->CTRL1 &= ~CAN_CTRL1_BOFFREC_MASK; + + // Hard coded wait time for bus to recover. + uint64_t deadline = supervisor_ticks_ms64() + 100; // 100ms timeout + do { + if (supervisor_ticks_ms64() > deadline) { + break; + } + RUN_BACKGROUND_TASKS; + } while (common_hal_canio_can_state_get(self) == BUS_STATE_OFF); + + self->data->base->CTRL1 |= CAN_CTRL1_BOFFREC_MASK; +} + +bool common_hal_canio_can_auto_restart_get(canio_can_obj_t *self) { + return self->auto_restart; +} + +void common_hal_canio_can_auto_restart_set(canio_can_obj_t *self, bool value) { + self->auto_restart = value; +} + +static void maybe_auto_restart(canio_can_obj_t *self) { + if (self->auto_restart) { + common_hal_canio_can_restart(self); + } +} + +void common_hal_canio_can_send(canio_can_obj_t *self, mp_obj_t message_in) { + maybe_auto_restart(self); + + canio_bus_state_t state = common_hal_canio_can_state_get(self); + if (state == BUS_STATE_OFF) { + // Bus is off. Transmit failed. + mp_raise_OSError(MP_ENODEV); + } + + canio_message_obj_t *message = message_in; + + flexcan_frame_t tx_frame; + memset(&tx_frame, 0, sizeof(tx_frame)); // Zero out output. + + if (message->extended) { + tx_frame.id = FLEXCAN_ID_EXT(message->id); + tx_frame.format = kFLEXCAN_FrameFormatExtend; + } else { + tx_frame.id = FLEXCAN_ID_STD(message->id); + tx_frame.format = kFLEXCAN_FrameFormatStandard; + } + + if (message->base.type == &canio_remote_transmission_request_type) { + tx_frame.type = kFLEXCAN_FrameTypeRemote; + } else { + tx_frame.type = kFLEXCAN_FrameTypeData; + } + + tx_frame.length = message->size; + + // We can safely copy all bytes, as both flexcan_frame_t and + // canio_message_obj_t define the data array as 8 bytes long, + // even if the actual DLC is shorter. + tx_frame.dataByte0 = message->data[0]; + tx_frame.dataByte1 = message->data[1]; + tx_frame.dataByte2 = message->data[2]; + tx_frame.dataByte3 = message->data[3]; + tx_frame.dataByte4 = message->data[4]; + tx_frame.dataByte5 = message->data[5]; + tx_frame.dataByte6 = message->data[6]; + tx_frame.dataByte7 = message->data[7]; + + flexcan_mb_transfer_t tx_xfer; + tx_xfer.mbIdx = mimxrt10xx_flexcan_get_free_tx_mbid(self); + tx_xfer.frame = &tx_frame; + + // Setup tx message buffer. + FLEXCAN_SetTxMbConfig(self->data->base, tx_xfer.mbIdx, true); + + if (FLEXCAN_TransferSendNonBlocking(self->data->base, &self->data->handle, &tx_xfer) != kStatus_Success) { + mp_raise_OSError(MP_EIO); + } +} + +bool common_hal_canio_can_silent_get(canio_can_obj_t *self) { + return self->silent; +} + +bool common_hal_canio_can_deinited(canio_can_obj_t *self) { + return !self->data; +} + +void common_hal_canio_can_check_for_deinit(canio_can_obj_t *self) { + if (common_hal_canio_can_deinited(self)) { + raise_deinited_error(); + } +} + +void common_hal_canio_can_deinit(canio_can_obj_t *self) { + if (self->data) { + mimxrt10xx_flexcan_abort_tx_frames(self); + FLEXCAN_TransferAbortReceiveFifo(self->data->base, &self->data->handle); + + FLEXCAN_Deinit(self->data->base); + + // Free can data by doing nothing and letting gc take care of it. + // If the VM has finished already, this will be safe. + self->data = NULL; + } + + common_hal_reset_pin(self->rx_pin); + common_hal_reset_pin(self->tx_pin); + + self->rx_pin = NULL; + self->tx_pin = NULL; +} + +void common_hal_canio_reset(void) { + for (size_t i = 0; i < MP_ARRAY_SIZE(can_objs); i++) { + if (can_objs[i]) { + common_hal_canio_can_deinit(can_objs[i]); + can_objs[i] = NULL; + } + } +} diff --git a/ports/mimxrt10xx/common-hal/canio/CAN.h b/ports/mimxrt10xx/common-hal/canio/CAN.h new file mode 100644 index 000000000000..11c77c9d4a4f --- /dev/null +++ b/ports/mimxrt10xx/common-hal/canio/CAN.h @@ -0,0 +1,24 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "py/obj.h" +#include "shared-bindings/canio/__init__.h" +#include "shared-bindings/canio/CAN.h" +#include "common-hal/microcontroller/Pin.h" +#include "common-hal/canio/__init__.h" + +typedef struct canio_can_obj { + mp_obj_base_t base; + mimxrt10xx_flexcan_data_t *data; + int baudrate; + const mcu_pin_obj_t *rx_pin; + const mcu_pin_obj_t *tx_pin; + bool loopback : 1; + bool silent : 1; + bool auto_restart : 1; +} canio_can_obj_t; diff --git a/ports/mimxrt10xx/common-hal/canio/Listener.c b/ports/mimxrt10xx/common-hal/canio/Listener.c new file mode 100644 index 000000000000..c2812b8b9934 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/canio/Listener.c @@ -0,0 +1,170 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox +// SPDX-FileCopyrightText: Copyright (c) 2025 SamantazFox +// +// SPDX-License-Identifier: MIT + + +#include +#include + +#include "py/obj.h" +#include "py/runtime.h" +#include "py/mperrno.h" + +#include "shared/runtime/interrupt_char.h" + +#include "common-hal/canio/__init__.h" +#include "common-hal/canio/Listener.h" +#include "shared-bindings/canio/Listener.h" +#include "shared-bindings/util.h" +#include "supervisor/shared/tick.h" +#include "sdk/drivers/flexcan/fsl_flexcan.h" + + +// Convert from back from FLEXCAN IDs to normal CAN IDs. +#define FLEXCAN_ID_TO_CAN_ID_STD(id) \ + ((uint32_t)((((uint32_t)(id)) & CAN_ID_STD_MASK) >> CAN_ID_STD_SHIFT)) + +#define FLEXCAN_ID_TO_CAN_ID_EXT(id) \ + ((uint32_t)((((uint32_t)(id)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK)) \ + >> CAN_ID_EXT_SHIFT)) + + +void common_hal_canio_listener_construct(canio_listener_obj_t *self, canio_can_obj_t *can, size_t nmatch, canio_match_obj_t **matches, float timeout) { + + common_hal_canio_listener_set_timeout(self, timeout); + + if (nmatch > MIMXRT10XX_FLEXCAN_RX_FILTER_COUNT) { + mp_raise_ValueError(MP_ERROR_TEXT("Filters too complex")); + } + + self->can = can; + + // Init configuration variables + flexcan_rx_fifo_config_t fifo_config; + fifo_config.idFilterNum = nmatch; + fifo_config.idFilterTable = self->can->data->rx_fifo_filter; + fifo_config.idFilterType = kFLEXCAN_RxFifoFilterTypeA; + fifo_config.priority = kFLEXCAN_RxFifoPrioHigh; + + if (nmatch == 0) { + // If the user has provided no matches, we need to set at least one + // filter that instructs the system to ignore all bits. + fifo_config.idFilterNum = 1; + self->can->data->rx_fifo_filter[0] = 0x0; + FLEXCAN_SetRxIndividualMask(self->can->data->base, 0, 0x0); + } else { + // Required to touch any CAN registers + FLEXCAN_EnterFreezeMode(self->can->data->base); + + for (size_t i = 0; i < nmatch; i++) { + if (matches[i]->extended) { + self->can->data->rx_fifo_filter[i] = FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(matches[i]->id, 0, 1); + self->can->data->base->RXIMR[i] = FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(matches[i]->mask, 0, 1); + } else { + self->can->data->rx_fifo_filter[i] = FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(matches[i]->id, 0, 0); + self->can->data->base->RXIMR[i] = FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(matches[i]->mask, 0, 0); + } + } + + // For consistency, even though FLEXCAN_SetRxFifoConfig() below will + // enter and exit freeze mode again anyway + FLEXCAN_ExitFreezeMode(self->can->data->base); + } + + FLEXCAN_SetRxFifoConfig(self->can->data->base, &fifo_config, true); +} + +void common_hal_canio_listener_set_timeout(canio_listener_obj_t *self, float timeout) { + self->timeout_ms = (int)MICROPY_FLOAT_C_FUN(ceil)(timeout * 1000); +} + +float common_hal_canio_listener_get_timeout(canio_listener_obj_t *self) { + return self->timeout_ms / 1000.0f; +} + +void common_hal_canio_listener_check_for_deinit(canio_listener_obj_t *self) { + if (!self->can) { + raise_deinited_error(); + } + common_hal_canio_can_check_for_deinit(self->can); +} + +int common_hal_canio_listener_in_waiting(canio_listener_obj_t *self) { + if (FLEXCAN_GetMbStatusFlags(self->can->data->base, kFLEXCAN_RxFifoFrameAvlFlag)) { + return 1; + } + return 0; +} + +mp_obj_t common_hal_canio_listener_receive(canio_listener_obj_t *self) { + if (!common_hal_canio_listener_in_waiting(self)) { + uint64_t deadline = supervisor_ticks_ms64() + self->timeout_ms; + do { + if (supervisor_ticks_ms64() > deadline) { + return NULL; + } + RUN_BACKGROUND_TASKS; + // Allow user to break out of a timeout with a KeyboardInterrupt. + if (mp_hal_is_interrupted()) { + return NULL; + } + } while (!common_hal_canio_listener_in_waiting(self)); + } + + flexcan_frame_t rx_frame; + if (FLEXCAN_ReadRxFifo(self->can->data->base, &rx_frame) != kStatus_Success) { + mp_raise_OSError(MP_EIO); + } + + // We've read from the FIFO, clear the "frame available" flag, which + // allows the CPU to serve the next FIFO entry + FLEXCAN_ClearMbStatusFlags(self->can->data->base, (uint32_t)kFLEXCAN_RxFifoFrameAvlFlag); + + canio_message_obj_t *message = m_new_obj(canio_message_obj_t); + memset(message, 0, sizeof(canio_message_obj_t)); + + if (rx_frame.format == kFLEXCAN_FrameFormatExtend) { + message->extended = true; + message->id = rx_frame.id; + } else { + message->extended = false; + message->id = rx_frame.id >> 18; // standard ids are left-aligned + } + + if (rx_frame.type == kFLEXCAN_FrameTypeRemote) { + message->base.type = &canio_remote_transmission_request_type; + } else { + message->base.type = &canio_message_type; + } + + message->size = rx_frame.length; + + // We can safely copy all bytes, as both flexcan_frame_t and + // canio_message_obj_t define the data array as 8 bytes long. + message->data[0] = rx_frame.dataByte0; + message->data[1] = rx_frame.dataByte1; + message->data[2] = rx_frame.dataByte2; + message->data[3] = rx_frame.dataByte3; + message->data[4] = rx_frame.dataByte4; + message->data[5] = rx_frame.dataByte5; + message->data[6] = rx_frame.dataByte6; + message->data[7] = rx_frame.dataByte7; + + return message; +} + +void common_hal_canio_listener_deinit(canio_listener_obj_t *self) { + if (self->can) { + // Clear all filters. + flexcan_rx_fifo_config_t fifo_config; + fifo_config.idFilterNum = 0; + fifo_config.idFilterTable = self->can->data->rx_fifo_filter; + fifo_config.idFilterType = kFLEXCAN_RxFifoFilterTypeA; + fifo_config.priority = kFLEXCAN_RxFifoPrioHigh; + FLEXCAN_SetRxFifoConfig(self->can->data->base, &fifo_config, true); + } + self->can = NULL; +} diff --git a/ports/mimxrt10xx/common-hal/canio/Listener.h b/ports/mimxrt10xx/common-hal/canio/Listener.h new file mode 100644 index 000000000000..2c1c1c82d50c --- /dev/null +++ b/ports/mimxrt10xx/common-hal/canio/Listener.h @@ -0,0 +1,16 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "common-hal/canio/CAN.h" +#include "shared-module/canio/Match.h" + +typedef struct canio_listener_obj { + mp_obj_base_t base; + canio_can_obj_t *can; + uint32_t timeout_ms; +} canio_listener_obj_t; diff --git a/ports/mimxrt10xx/common-hal/canio/__init__.c b/ports/mimxrt10xx/common-hal/canio/__init__.c new file mode 100644 index 000000000000..aaae9be4d4c7 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/canio/__init__.c @@ -0,0 +1,8 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox +// SPDX-FileCopyrightText: Copyright (c) 2025 SamantazFox +// +// SPDX-License-Identifier: MIT + +#include "common-hal/canio/__init__.h" diff --git a/ports/mimxrt10xx/common-hal/canio/__init__.h b/ports/mimxrt10xx/common-hal/canio/__init__.h new file mode 100644 index 000000000000..8f63b6c2f117 --- /dev/null +++ b/ports/mimxrt10xx/common-hal/canio/__init__.h @@ -0,0 +1,54 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox +// SPDX-FileCopyrightText: Copyright (c) 2025 SamantazFox +// +// SPDX-License-Identifier: MIT + +#pragma once + +#include "shared-module/canio/Message.h" +#include "sdk/drivers/flexcan/fsl_flexcan.h" + +// There are 64 message buffers in each mimxrt10xx chip. +// Rx fifo will use the message buffers at the front (from index zero). +// As far as I can see rx fifo uses message buffer 0 to 5. +// Also id filter table might occupy message buffer memory area 6 to 37. +// +// Let's use the last few message buffers for sending. +// +// We use 8 (tx) message buffers in total. +// This makes tracking the state (free/busy) of each (tx) message buffer easy. +// We can use a single byte, where each bit represent the state. +// Zero means the message buffer can be used for sending. +// One means the message buffer is busy sending. +// If you make this larger then you have to change the type of 'tx_state' in struct 'mimxrt10xx_flexcan_data_t'. +#define MIMXRT10XX_FLEXCAN_TX_MB_NUM (8) + +// For safety we use SDK provided macro to get the last message buffer index instead of hard coding it. +#define MIMXRT10XX_FLEXCAN_TX_MBID_MAX (FSL_FEATURE_FLEXCAN_HAS_MESSAGE_BUFFER_MAX_NUMBERn(0)) +#define MIMXRT10XX_FLEXCAN_TX_MBID_MIN (MIMXRT10XX_FLEXCAN_TX_MBID_MAX - MIMXRT10XX_FLEXCAN_TX_MB_NUM) + +// Convert from tx message buffer index to frame array index. +#define MIMXRT10XX_FLEXCAN_TX_MBID_TO_ARRID(x) (x - MIMXRT10XX_FLEXCAN_TX_MBID_MIN) + +// Convert from frame array index to tx message buffer index. +#define MIMXRT10XX_FLEXCAN_TX_ARRID_TO_MBID(x) (x + MIMXRT10XX_FLEXCAN_TX_MBID_MIN) + +// We limit the amount of filter+mask pairs to 8 because above that the filters +// are impacted by the global mask rather than individual masks alone, which is +// not compatible with the current canio implementation. +// +// See Table 44-22 of the i.MX RT1060 Processor Reference Manual, Rev. 3 +// for more details. +#define MIMXRT10XX_FLEXCAN_RX_FILTER_COUNT (8) + +// Enables/disables SDK calculated "improved" timing configuration. +#define MIMXRT10XX_FLEXCAN_USE_IMPROVED_TIMING_CONFIG (1) + +typedef struct { + CAN_Type *base; // FlexCAN peripheral base address. + flexcan_handle_t handle; // FlexCAN handle which can be used for FlexCAN transactional APIs. + uint8_t tx_state; + uint32_t rx_fifo_filter[MIMXRT10XX_FLEXCAN_RX_FILTER_COUNT]; +} mimxrt10xx_flexcan_data_t; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c index 9385c9cc4c71..86ae09f7ca02 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c @@ -167,9 +167,9 @@ void clocks_init(void) { CLOCK_DisableClock(kCLOCK_Can2S); CLOCK_DisableClock(kCLOCK_Can3S); /* Set CAN_CLK_PODF. */ - CLOCK_SetDiv(kCLOCK_CanDiv, 1); + CLOCK_SetDiv(kCLOCK_CanDiv, 2); // Clock divider for master flexcan clock source /* Set Can clock source. */ - CLOCK_SetMux(kCLOCK_CanMux, 2); + CLOCK_SetMux(kCLOCK_CanMux, 0); // Select 60M clock divided by USB1 PLL (480 MHz) as master flexcan clock source /* Disable UART clock gate. */ CLOCK_DisableClock(kCLOCK_Lpuart1); CLOCK_DisableClock(kCLOCK_Lpuart2); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c index 4d5e909bede0..cc19dc137b6a 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -276,6 +276,40 @@ const mcu_periph_obj_t mcu_mqs_right_list[3] = { PERIPH_PIN(3, 2, 0, 0, &pin_GPIO_B0_00), }; +CAN_Type *const mcu_can_banks[3] = { CAN1, CAN2, CAN3 }; + +const mcu_periph_obj_t mcu_can_rx_list[11] = { + PERIPH_PIN(1, 4, kIOMUXC_FLEXCAN1_RX_SELECT_INPUT, 0, &pin_GPIO_SD_B1_03), + PERIPH_PIN(1, 3, kIOMUXC_FLEXCAN1_RX_SELECT_INPUT, 1, &pin_GPIO_EMC_18), + PERIPH_PIN(1, 2, kIOMUXC_FLEXCAN1_RX_SELECT_INPUT, 2, &pin_GPIO_AD_B1_09), + PERIPH_PIN(1, 2, kIOMUXC_FLEXCAN1_RX_SELECT_INPUT, 3, &pin_GPIO_B0_03), + + PERIPH_PIN(2, 3, kIOMUXC_FLEXCAN2_RX_SELECT_INPUT, 0, &pin_GPIO_EMC_10), + PERIPH_PIN(2, 0, kIOMUXC_FLEXCAN2_RX_SELECT_INPUT, 1, &pin_GPIO_AD_B0_03), + PERIPH_PIN(2, 6, kIOMUXC_FLEXCAN2_RX_SELECT_INPUT, 2, &pin_GPIO_AD_B0_15), + PERIPH_PIN(2, 6, kIOMUXC_FLEXCAN2_RX_SELECT_INPUT, 3, &pin_GPIO_B1_09), + + PERIPH_PIN(3, 9, 0, 0, &pin_GPIO_EMC_37), + PERIPH_PIN(3, 8, 0, 0, &pin_GPIO_AD_B0_11), + PERIPH_PIN(3, 8, 0, 0, &pin_GPIO_AD_B0_15), +}; + +const mcu_periph_obj_t mcu_can_tx_list[11] = { + PERIPH_PIN(1, 3, 0, 0, &pin_GPIO_EMC_17), + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_AD_B1_08), + PERIPH_PIN(1, 2, 0, 0, &pin_GPIO_B0_02), + PERIPH_PIN(1, 4, 0, 0, &pin_GPIO_SD_B1_02), + + PERIPH_PIN(2, 3, 0, 0, &pin_GPIO_EMC_09), + PERIPH_PIN(2, 0, 0, 0, &pin_GPIO_AD_B0_02), + PERIPH_PIN(2, 6, 0, 0, &pin_GPIO_AD_B0_14), + PERIPH_PIN(2, 6, 0, 0, &pin_GPIO_B1_08), + + PERIPH_PIN(3, 9, 0, 0, &pin_GPIO_EMC_36), + PERIPH_PIN(3, 8, 0, 0, &pin_GPIO_AD_B0_10), + PERIPH_PIN(3, 8, 0, 0, &pin_GPIO_AD_B0_14), +}; + const mcu_pwm_obj_t mcu_pwm_list[67] = { PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, IOMUXC_GPIO_EMC_23_FLEXPWM1_PWMA00, &pin_GPIO_EMC_23), PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, IOMUXC_GPIO_SD_B0_00_FLEXPWM1_PWMA00, &pin_GPIO_SD_B0_00), diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h index ab1355ae55a5..9c41e563c482 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.h @@ -41,4 +41,8 @@ extern const mcu_periph_obj_t mcu_i2s_mclk_list[7]; extern const mcu_periph_obj_t mcu_mqs_left_list[3]; extern const mcu_periph_obj_t mcu_mqs_right_list[3]; +extern CAN_Type *const mcu_can_banks[3]; +extern const mcu_periph_obj_t mcu_can_rx_list[11]; +extern const mcu_periph_obj_t mcu_can_tx_list[11]; + extern const mcu_pwm_obj_t mcu_pwm_list[67]; diff --git a/ports/mimxrt10xx/tools/gen_peripherals_data.py b/ports/mimxrt10xx/tools/gen_peripherals_data.py index e255ed844a5e..664e1c655658 100644 --- a/ports/mimxrt10xx/tools/gen_peripherals_data.py +++ b/ports/mimxrt10xx/tools/gen_peripherals_data.py @@ -1,4 +1,5 @@ import sys +import re import pathlib import xml.etree.ElementTree as ET @@ -8,6 +9,7 @@ "LPUART": ["RX", "TX", "RTS", "CTS"], "I2S": ["RX_DATA0", "RX_SYNC", "TX_BCLK", "TX_DATA0", "TX_SYNC", "MCLK"], "MQS": ["LEFT", "RIGHT"], + "CAN": ["RX", "TX"], } SIGNAL_RENAME = { @@ -21,6 +23,23 @@ "RX_DATA": "RX_DATA0", } +INSTANCE_RENAME = {"FLEXCAN": "CAN"} + +INSTANCE_RE = re.compile("([a-zA-Z0-9]+?)([0-9]+)$") + + +def rename_instance(instance: str) -> str: + instance_match = INSTANCE_RE.match(instance) + if instance_match is None: + return instance + instance_res = instance_match.groups() + if len(instance_res) < 2: + return instance + instance_name = str(instance_res[0]) + instance_id = str(instance_res[1]) + return INSTANCE_RENAME.get(instance_name, instance_name) + instance_id + + SKIP_LPSR = True svd_folder = pathlib.Path(sys.argv[1]) @@ -37,6 +56,7 @@ // SPDX-FileCopyrightText: Copyright (c) 2019 Lucian Copeland for Adafruit Industries // SPDX-FileCopyrightText: Copyright (c) 2019 Artur Pacholec // SPDX-FileCopyrightText: Copyright (c) 2023 Scott Shawcroft for Adafruit Industries +// SPDX-FileCopyrightText: Copyright (c) 2023 qutefox // // SPDX-License-Identifier: MIT """ @@ -54,6 +74,7 @@ print(device) autogen_warning = autogen_warning_template.format(device) svd_fn = svd_folder / device / (device + ".xml") + if not svd_fn.exists(): svd_fn = svd_folder / device / (device + "_cm7.xml") @@ -144,8 +165,10 @@ if name.endswith("SELECT_INPUT"): name_split = name.split("_") instance = name_split[0] + instance = rename_instance(instance) signal = "_".join(name_split[1:-2]) signal = SIGNAL_RENAME.get(signal, signal) + if instance not in peripheral_inputs: peripheral_inputs[instance] = {} if signal not in peripheral_inputs[instance]: @@ -232,6 +255,7 @@ print("skipping", pin_name, connection) continue instance, signal = connection.split("_", maxsplit=1) + instance = rename_instance(instance) signal = SIGNAL_RENAME.get(signal, signal) if instance not in peripheral_inputs: peripheral_inputs[instance] = {} @@ -288,6 +312,7 @@ short_name = ptype.lower() if short_name.startswith("lp"): short_name = short_name[2:] + # Only one MQS exists and it is related to SAI3 if ptype != "MQS": periph_h.append( diff --git a/shared-bindings/canio/CAN.c b/shared-bindings/canio/CAN.c index 82bf86dd97b2..47ba5d62df8b 100644 --- a/shared-bindings/canio/CAN.c +++ b/shared-bindings/canio/CAN.c @@ -187,6 +187,10 @@ static MP_DEFINE_CONST_FUN_OBJ_1(canio_can_restart_obj, canio_can_restart); //| //| ESP32S2 supports one Listener. There is a single filter block, which can either match a //| standard address with mask or an extended address with mask. +//| +//| i.MX RT10xx supports one Listener and 8 filter blocks per CAN interface. +//| Each interface is fully independent from the other. A filter block can match +//| either a single address or a mask of addresses, both standard or extended. //| """ //| ... static mp_obj_t canio_can_listen(size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {